When a charged object is brought into close proximity to an uncharged or oppositely charged device, an electrostatic discharge (ESD) often occurs, particularly if the device includes conductive elements. As the excess charge carriers begin to flow from the charged object to the device, they induce a breakdown of the intervening dielectric, reducing resistance for ensuing carrier flow and enabling a charge equalization to occur on a very short time scale, e.g., 100 ns. At this time scale, a relatively modest discharge can nevertheless present current and voltage levels well in excess of the capabilities of most solid-state electronics.
For example, modern transceivers for high-speed serial data interfaces (e.g., USB 3.0/3.1, HDMI 1.3/1.4, which support data rates above 10 Gbps) are built with small geometry processes that are extremely sensitive to ESD. ESD damage is likely to occur if such transceivers are exposed to excessive voltage for more than 5 ns. Conventional low-voltage clamping structures such as a Silicon- (or Semiconductor-) Controlled Rectifier (SCR) provide a delayed clamping response or require a high trigger voltage that risks damage to sensitive protected devices. Where such low-voltage clamping structures provide a low holding current, they may also be susceptible to latch-up faults. Other existing ESD protection structures, if designed with low enough capacitance and insertion loss to maintain data integrity for the high-speed serial data interfaces, struggle to shed the excessive voltage quickly enough.